EPGA Implementation and Verification of CSIX Module


, , , Journal of Information Processing Systems Vol. 3, No. 5, pp. 9-18, Oct. 2002  


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Abstract

CSIX-L1 is the Common Switch Interface that defines a physical interface for transferring information between a traffic manager (Network Processor) and a switching fabric in ATM, IP, MPLS, Ethernet and data communication areas. In Tx, data to be transmitted is generated in Cframe which is the base information unit and in Rx, original data is extracted from the received Cframe. CSIX-L1 suppots the 32, 64, 96, and 123-bit interface and generates a variable length CFrame and Idle Cframe. Also CSIX-L1 appends Padding byte and supports 16-bit Vertical parity, CSIX-L1 is designed using Xilinx 4,1i. After functional and timing simulations are completed. CSIX-L1 module is downloaded in Xilinx FPGA XCV1000EHQ240C and verified. The synthesized CSIX module operates at 27MHz.


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Cite this article
[APA Style]
김형준, 손승일, & 강민구 (2002). EPGA Implementation and Verification of CSIX Module. Journal of Internet Computing and Services, 3(5), 9-18.

[IEEE Style]
김형준, 손승일, 강민구, "EPGA Implementation and Verification of CSIX Module," Journal of Internet Computing and Services, vol. 3, no. 5, pp. 9-18, 2002.

[ACM Style]
김형준, 손승일, and 강민구. 2002. EPGA Implementation and Verification of CSIX Module. Journal of Internet Computing and Services, 3, 5, (2002), 9-18.